CS2022 COMPUTER ARCHITECTURE
UNIT I INSTRUCTION SET ARCHITECTURE 9
Introduction to computer architecture - Review of digital design – Instructions and
addressing – procedures and data – assembly language programs – instruction set
variations
UNIT II ARITHMETIC/LOGIC UNIT 9
Number representation – design of adders – design of simple ALUs – design of
Multipliers and dividers – design of floating point arithmetic unit
UNIT III DATA PATH AND CONTROL 9
Instruction execution steps – control unit synthesis – microprogramming – pipelining –
pipeline performance
UNIT IV MEMORY SYSTEM 9
Main Memory concepts – types of memory – cache memory organization – secondary
storage – virtual memory – paging
UNIT V I/O AND INTERFACES 9
I/O devices – I/O programming – polling – interrupts – DMA – buses – links – interfacing
– context switching – threads and multithreading
L = 45 T = 15 TOTAL = 60 PERIODS
TEXT BOOKS:
1. B. Parhami, “Computer Architecture”, Oxford University Press, 2005.
2. Carl Hamacher, Zvonko Vranesic and Safwat Zaky, “Computer Organization”, Fifth
Edition, Tata McGraw Hill, 2002.
REFERENCES:
1. David A. Patterson and John L. Hennessy, “Computer Organization and Design: The
Hardware/Software interface”, Third Edition, Elsevier, 2004.
2. William Stallings, “Computer Organization and Architecture – Designing for
Performance”, Seventh Edition, Pearson Education, 2006.
3. Miles Murdocca “Computers Architecture and Organization An Integrated approach”,
Wiley India pvt Ltd, 2007
4. John D. Carpinelli, “Computer systems organization and Architecture”, Pearson
Education, 2001.
UNIT I INSTRUCTION SET ARCHITECTURE 9
Introduction to computer architecture - Review of digital design – Instructions and
addressing – procedures and data – assembly language programs – instruction set
variations
UNIT II ARITHMETIC/LOGIC UNIT 9
Number representation – design of adders – design of simple ALUs – design of
Multipliers and dividers – design of floating point arithmetic unit
UNIT III DATA PATH AND CONTROL 9
Instruction execution steps – control unit synthesis – microprogramming – pipelining –
pipeline performance
UNIT IV MEMORY SYSTEM 9
Main Memory concepts – types of memory – cache memory organization – secondary
storage – virtual memory – paging
UNIT V I/O AND INTERFACES 9
I/O devices – I/O programming – polling – interrupts – DMA – buses – links – interfacing
– context switching – threads and multithreading
L = 45 T = 15 TOTAL = 60 PERIODS
TEXT BOOKS:
1. B. Parhami, “Computer Architecture”, Oxford University Press, 2005.
2. Carl Hamacher, Zvonko Vranesic and Safwat Zaky, “Computer Organization”, Fifth
Edition, Tata McGraw Hill, 2002.
REFERENCES:
1. David A. Patterson and John L. Hennessy, “Computer Organization and Design: The
Hardware/Software interface”, Third Edition, Elsevier, 2004.
2. William Stallings, “Computer Organization and Architecture – Designing for
Performance”, Seventh Edition, Pearson Education, 2006.
3. Miles Murdocca “Computers Architecture and Organization An Integrated approach”,
Wiley India pvt Ltd, 2007
4. John D. Carpinelli, “Computer systems organization and Architecture”, Pearson
Education, 2001.
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